Mapping the Intel last-level cache
Authors
University of Adelaide
NICTA
UNSW
Princeton University
Published:
http://eprint.iacr.org/Abstract
Modern Intel processors use an undisclosed hash function to map memory lines into last-level cache slices. In this work we develop a technique for reverse-engineering the hash function. We apply the technique to a 6-core Intel processor and demonstrate that knowledge of this hash function can facilitate cache-based side channel attacks, reducing the amount of work required for profiling the cache by three orders of magnitude. We also show how using the hash function we can double the number of colours used for page-colouring techniques.
BibTeX Entry
@misc{Yarom_GLLH_15, author = {Yarom, Yuval and Ge, Qian and Liu, Fangfei and Lee, Ruby B. and Heiser, Gernot}, booktitle = {The Cryptology ePrint Archive}, howpublished = {http://eprint.iacr.org/}, month = sep, paperurl = {https://trustworthy.systems/publications/nicta_full_text/9026.pdf}, title = {Mapping the {Intel} Last-Level Cache}, year = {2015} }