Virtual memory in a 64-bit microkernel
Authors
School of Computer Science and Engineering
UNSW,
Sydney 2052, Australia
Abstract
Virtual memory is a feature of most operating systems. It presents a level of indirection between the addresses that an application views, and the physical memory addresses used by the hardware. The benefits of virtual memory include: security, reliability, application transparent relocation of physical memory, and cache partitioning.
The page table is a critical component of a paged virtual memory system. The page table contains the set of translations that map virtual addresses to physical addresses. The implementation of a page-table structure affects the cost of virtual memory to applications. This thesis explores the cost of various page-table structures to applications in a 64-bit microkernel environment. The primary goal of the thesis is to identify the page-table structures most suited to a microkernel environment, i.e. an environment that is expected to efficiently support a diverse range of applications and operating systems, including single-address-space operating systems which are expected to feature large sparse address spaces.
This thesis examines the performance of real implementations of multilevel, hashed, clustered and guarded page tables in a real 64-bit microkernel, on an architecture (MIPS R4x00) featuring a software-loaded TLB. Simulation is not used to estimate performance. We examine page-table performance in terms of TLB-refill cost, page-table memory consumption, microkernel mapping primitives and address-space setup and tear-down costs.
The results show that each page-table structure has its strong and weak points. The results identify the spill-over effect in guarded page tables, and demonstrates the importance of cache priming in hash-based page tables. In conclusion, the results show that guarded page tables augmented with a software second-level TLB is the best choice in a microkernel environment. They do not perform significantly worse than other page-table structures in the benchmarks undertaken, and perform significantly better than the other page-table structures when sparse operations are involved.
BibTeX Entry
@phdthesis{Elphinstone:phd, address = {Sydney, Australia}, author = {Kevin Elphinstone}, month = mar, note = {Available from publications page at \url{http://ts.data61.csiro.au/}}, paperurl = {https://trustworthy.systems/publications/papers/Elphinstone%3Aphd.pdf}, school = {UNSW}, title = {Virtual Memory in a 64-bit Microkernel}, year = {1999} }