Qian Ge
PhD Student
Research Interests
Qian has just finished a PhD on eliminating timing side channels from seL4 with lightweight countermeasures.
Contact Details
More contact information is available at the Contact page.
We investigate kernel mechanisms for enforcing system security policies. In particular, we investigate kernel mechanisms for eliminating timing side channels that are general and minimal enough to merit inclusion into a general-purpose production version of the kernel (i.e. one not only meant for deployments where timing channels are a concern). I am designing kernel mechanisms in seL4. seL4 is a capability based general-purpose microkernel. The design goal of seL4 is to provide a minimal set of mechanisms for high assurance systems, forming a good platform for system security research. Furthermore, we expect that our contributions will benefit not only seL4 but also other kernels or hypervisors.
Projects
Past |
Recognition and Awards
Google PhD Fellowship in Systems
Publications
Best Papers
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Qian Ge, Yuval Yarom, Tom Chothia and Gernot Heiser Time protection: The missing OS abstraction EuroSys Conference, Dresden, Germany, March, 2019 Best Paper Award |
Trustworthy Systems Group Papers
2019
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Qian Ge Principled elimination of microarchitectural timing channels through operating-system enforced time protection PhD Thesis, UNSW, Sydney, Australia, October, 2019 |
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Qian Ge, Yuval Yarom, Tom Chothia and Gernot Heiser Time protection: The missing OS abstraction EuroSys Conference, Dresden, Germany, March, 2019 Best Paper Award |
2018
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Qian Ge, Yuval Yarom and Gernot Heiser No security without time protection: we need a new hardware-software contract Asia-Pacific Workshop on Systems (APSys), Korea, August, 2018 Best Paper Award Complete timing-channel data for evaluated x86 and Arm platforms. |
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Qian Ge, Yuval Yarom, David Cock and Gernot Heiser A survey of microarchitectural timing attacks and countermeasures on contemporary hardware Journal of Cryptographic Engineering, Volume 8, Issue 1, pp. 1-27, April, 2018 |
2017
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Qian Ge, Yuval Yarom, Frank Li and Gernot Heiser Your processor leaks information — and there's nothing you can do about it arXiv preprint, 2017 |
2016
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Fangfei Liu, Qian Ge, Yuval Yarom, Frank Mckeen, Carlos Rozas, Gernot Heiser and Ruby B Lee CATalyst: defeating last-level cache side channel attacks in cloud computing IEEE Symposium on High-Performance Computer Architecture, pp. 406–418, Barcelona, Spain, March, 2016 |
2015
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Yuval Yarom, Qian Ge, Fangfei Liu, Ruby B. Lee and Gernot Heiser Mapping the Intel last-level cache The Cryptology ePrint Archive, September, 2015 |
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Fangfei Liu, Yuval Yarom, Qian Ge, Gernot Heiser and Ruby B Lee Last-level cache side-channel attacks are practical IEEE Symposium on Security and Privacy, pp. 605–622, San Jose, CA, US, May, 2015 |
2014
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David Cock, Qian Ge, Toby Murray and Gernot Heiser The last mile: An empirical study of some timing channels on seL4 ACM Conference on Computer and Communications Security, pp. 570–581, Scottsdale, AZ, USA, November, 2014 |



